It is desirable to reduce the amount of testing effort required for an integrated circuit design. Typically, integrated circuit devices based on the integrated circuit design are tested to ensure that the design operates according to a desired specification. In addition a number of integrated circuits of each production batch of the integrated circuit design are tested to ensure that the integrated circuits of the production batch comply with the specification.
Typically, one characteristic that is tested for in each production batch is the critical delay paths of the integrated circuit design. The critical delay paths are the delay paths that are most likely to violate the timing specification for the integrated circuit design. To test the critical delay paths, predicted critical delay paths are identified using prediction techniques based on design models of the integrated circuit design, and the delay paths identified by the prediction are tested during the testing process for the production batch. However, the actual critical delay paths of the integrated circuits of a production batch can vary from the predicted critical paths of the integrated circuit design due to process variations or other factors. Testing more of the delay paths of the production batch increases the likelihood that the actual critical paths have been tested, but at a cost of increased testing time. Accordingly, an improved method of identifying critical delay paths of an integrated circuit is desirable.